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Job details

DFT Engineer - job 1 of 2

Job Summary

A company is looking for a DFT (Design for Test) Engineer to join their ASIC design team.

Key Responsibilities
  • Oversee DFT aspects of ASIC Design with a strong understanding of digital design concepts
  • Adhere to the ASIC development process and collaborate with various teams to achieve project goals
  • Develop DFT architecture, provide documentation, and work with digital designers for implementation
Required Qualifications
  • U.S. Citizenship required
  • Bachelor's degree in Electrical or Computer Engineering with 8+ years of experience or a Master's degree with 6 years of experience
  • Experience in the full product life cycle of ASIC Design
  • Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python, or Perl
  • Experience with Cadence and/or Mentor test insertion and ATPG tools

Average salary estimate

$150000 / YEARLY (est.)
min
max
$120000K
$180000K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

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FUNDING
DEPARTMENTS
SENIORITY LEVEL REQUIREMENT
TEAM SIZE
No info
EMPLOYMENT TYPE
Full-time, remote
DATE POSTED
July 15, 2025

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